Fix PCIe Gen 3: move dtparam into [pi5] section of config.txt

The dtparam=pciex1_gen=3 was being appended after the [all] section,
but RPi firmware requires PCIe dtparams in the [pi5] section.
Switch from configTxtAppend to full configTxt replacement to control
section ordering. Also add dtparam=pciex1 to explicitly enable the
external PCIe link.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>

Makefile

@@ -57,7 +57,7 @@ ATTESTATION_ARGS = --provenance=mode=max --sbom=true
 IMAGER_COMMON_FLAGS = \
 	--overlay-name="rpi5" \
 	--overlay-image="$(OVERLAY_IMAGE):$(SBCOVERLAY_TAG)" \
-	--overlay-option="configTxtAppend=$$(cat $(PWD)/config/config.txt.append)" \
+	--overlay-option="configTxt=$$(cat $(PWD)/config/config.txt)" \
 	$(EXTENSION_FLAGS)
 
 #

config/config.txt

@@ -0,0 +1,31 @@
+# See https://www.raspberrypi.com/documentation/computers/configuration.html
+# Reduce GPU memory to give more to CPU.
+gpu_mem=32
+# Enable maximum compatibility on both HDMI ports;
+# only the one closest to the power/USB-C port will work in practice.
+hdmi_safe:0=1
+hdmi_safe:1=1
+# Load U-Boot.
+kernel=u-boot.bin
+# Forces the kernel loading system to assume a 64-bit kernel.
+arm_64bit=1
+# Run as fast as firmware / board allows.
+arm_boost=1
+# Enable the primary/console UART (globally).
+enable_uart=1
+# Disable UART on Pi5 to avoid U-Boot compatibility issue.
+# The debug UART (ttyAMA10) is always active regardless of this setting.
+[pi5]
+enable_uart=0
+# Enable PCIe and force Gen 3 for NVMe (~800 MB/s vs ~400 MB/s Gen 2)
+dtparam=pciex1
+dtparam=pciex1_gen=3
+[all]
+# Disable Bluetooth.
+dtoverlay=disable-bt
+# Disable Wireless Lan.
+dtoverlay=disable-wifi
+# CM5 Overclock — 2.6GHz stable on Compute Blade with heatsink
+arm_freq=2600
+over_voltage_delta=50000
+arm_boost=1

config/config.txt.append

@@ -3,5 +3,6 @@ arm_freq=2600
 over_voltage_delta=50000
 arm_boost=1
 
-# Enable PCIe Gen 3 for NVMe (~800 MB/s vs ~400 MB/s Gen 2)
+# Enable external PCIe link and set Gen 3 for NVMe (~800 MB/s vs ~400 MB/s Gen 2)
+dtparam=pciex1
 dtparam=pciex1_gen=3